Project Outline/Goals/Tentative Schedule

Week of May 23:

Understand and become familiar with CMU/workstation computer/project

Begin reading background material and reports


Week of May 30:

Understand and become familiar with *all* aspects of the software already written for the project


Week of June 6:

Start analyzing the code doing the primary inputs to gate delay calculation, including doing some tests on small circuits. The correctness can only be tested on small circuits by comparing with hand calculations.


Week of June 13:

Design Automation Conference


Week of June 20:

Identify if there are any memory leaks/bottlenecks or problems with the implementation that makes it fail for large circuits


Week of June 27:

Propose solutions and start coding to accomplish the goal

Mid-project presentation


Week of July 4:

Continue coding and testing for small benchmarks


Week of July 11:

Complete coding, testing for small benchmarks


Week of July 18:

Produce full results for all benchmarks (including larger ones that currently cannot be completed)


Week of July 25:

Finish final report and presentation


Week of August 1:

Wrap-up

Return to California